Semiconductor substrate or manufacturing method therefor



【課題】平面形状の面積が大きい平板状空洞を備えた半導体基板または半導体装置の製造方法を提供することにある。 【解決手段】半導体基板1の表面にホール4を複数形成する。この後、減圧下において非酸化性雰囲気のアニール処理を行う。アニール処理により、半導体基板1の表面を半導体の表面マイグレーションを利用して平坦化し、基板内部に平板状空洞6を形成する。このアニール処理の際に、ホール4の開口部が閉じた後に減圧下の状態のまま半導体のソースガスを供給する。 【選択図】図1
PROBLEM TO BE SOLVED: To provide a semiconductor substrate including a planar cavity having large area in a planar shape, or a manufacturing method therefor.SOLUTION: A plurality of holes 4 are formed on the surface of a semiconductor substrate 1. Subsequently, annealing in the non-oxidizing atmosphere is performed under reduced pressure. During the annealing, the surface of the semiconductor substrate 1 is flattened by utilizing surface migration of a semiconductor, and a planar cavity 6 is formed in the substrate. After the opening of the hole 4 is closed in the annealing, source gas of semiconductor is supplied under the state of reduced pressure still.




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Patent Citations (6)

    Publication numberPublication dateAssigneeTitle
    JP-2001144276-AMay 25, 2001Toshiba Corp, 株式会社東芝半導体基板およびその製造方法
    JP-2003258212-ASeptember 12, 2003Toshiba Corp, 株式会社東芝Semiconductor device
    JP-2007180266-AJuly 12, 2007Toshiba Ceramics Co Ltd, 東芝セラミックス株式会社Standard silicon wafer used for inspection made by defect inspection device, its manufacturing method, and inspection method using standard silicon wafer
    JP-H01128442-AMay 22, 1989Nissan Motor Co LtdManufacture of semiconductor substrate
    US-2003122191-A1July 03, 2003Hajime Nagano, Ichiro Mizushima, Takashi Yamada, Yuso Udo, Shinichi NittaSemiconductor device formed in semiconductor layer arranged on substrate with one of insulating film and cavity interposed between the substrate and the semiconductor layer
    US-2008003771-A1January 03, 2008Kabushiki Kaisha ToshibaSemiconductor substrate and its fabrication method

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    Publication numberPublication dateAssigneeTitle